The European Processor Initiative (EPI) has wrapped up the first phase of its effort to create a made-in-Europe chips ecosystem. The effort hopes to reduce reliance on imports, give the bloc sovereign capabilities, and create the continent’s first exascale supercomputer.

The EPI end-of-year report came out this week. It noted a few significant achievements, including delivering the specifications of Rhea (the first generation of the EPI General-Purpose Processor (GPP) implementation and future derivatives.)

EPI plans to deploy Rhea – built on Arm’s Neoverse V1 processor architecture, with 29 RISC-V cores as controllers – in an exascale supercomputer in 2023.

On the path to chip sovereignty

The chip was designed by the French company SiPearl, which partners with Atos in the silicon design phase. SiPearl CEO Phillippe Notton spoke to the Register in October 2021, saying that intel’s upcoming Ponte Vecchio GPU accelerator will work in conjunction with its Rhea chip in supercomputers.

The RISC-V power controller Rhea will use was developed by the University of Bologna and ETH Zurich.

EPI revealed that the controller uses advanced control and artificial intelligence algorithms for the power management of large-scale systems-on-chip. Another achievement of phase one was the development of the European Processor Accelerator (EPAC) test chip proof-of-concept.

A bloc-wide collaboration

Barcelona Supercomputing Center and Croatia-based University of Zagreb took on the task of developing vector processing units for high-performance, low-power computing. The design is based on Barcelona’s Semidynamics’ Avispado RISC-V core.

The project also saw the delivery of the proof of concept for an innovative embedded high-performance compute platform and associated software development kit for the automotive market.

Most of the EPI’s work is on RISC-V (also known as the Linux of chips), allowing for collaboration in design and development. The architecture was created by researchers in 2010 and is free to license.