AI chip startup Tenstorrent will use SiFive’s RISC-V cores

AI chip startup Tenstorrent will use SiFive’s RISC-V cores

Tenstorrent, a start-up led by several former high-level AMD employees, has entered into a partnership with SiFive. The start-up wants to incorporate the design of the company’s Intelligence X280 processor into its own chips for AI applications.

SiFive’s X280 cores are based on the RISC-V architecture, with support for 64-bit integers, multicore designs and RISC-V’s vector math extension. This extension is expected to prove useful for machine-learning applications in the future.

Specialised for neural networks

By combining these X280 cores with its own Tensix cores, Tenstorrent hopes to create specialised processors that can handle exponentially growing neural networks. The start-up wants to achieve this using packet processing, rather than the usual approach with matrix calculations, writes The Register. Ultimately, Tenstorrent wants to offer a complete hardware and software stack for neural networks.

Big names with AMD roots

The team behind Tenstorrent includes some big names. The CEO of the company is Ljubisa Bajic. Bajic spent many years as a chip architect at AMD, as well as a brief stint at Nvidia. He is assisted by Jim Keller, a chip designer who made a name for himself with his contributions to the successful AMD processors around the turn of the millennium. He later helped Apple design their own ARM chips for iPhones, before returning to AMD to design the Zen architecture. At Tenstorrent, Keller serves as CTO and president of the company. Other senior employees also have impressive histories at companies such as AMD and Intel.

Training and inference on a single chip

The plans of the team appear grand. They seem to indicate a processor that brings together several different AI capabilities on one chip. The Tensix cores handle the neural network and the X280 cores handle the application code and any applications that require vector calculations. Thus, both training and inference can be performed by a single chip.

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